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steve/son-package

No-lead small-outline IC packages by TI outline: WSON-8/10/12/16, VSON-8 and X1SON-8, 0.4 to 0.8 mm pitch, with exposed thermal pad.

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part.py 56 lines · Python · STEVE runtime · checked
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1"""No-lead small-outline IC package (WSON, VSON, DFN) by TI package outline. Centred on the origin with the seating plane on the XY plane, pins 1 to n/2
2on the -Y side running +X, the others on +Y running back, and the exposed thermal pad in the middle. Dimensions from the TI outline named by `package`; see
3the README."""
4from steve import Model
5
6package = "DSQ0010A" # TI package outline
7detail = "full" # full: body, pin-1 mark, terminals and thermal pad; simple: the body only
8
9# outline: (kind, pins, pitch, body length along the pin rows, body width across them, height, standoff, terminal length, terminal width, thermal pad
10# across the rows, thermal pad along them, terminal thickness), ranges as (min, max), single values as drawn (thickness is the outline's reference), mm.
11# TI package outlines, https://www.ti.com/lit/pdf/<doc>: DSQ0010A mpds335 (4218906/A 04/2019), NGQ0008A mpds403 (4214922/A 03/2018), DNT0012B mpds48
12# (4214928/C 10/2021), NHR0016B mpds42 (4214932/B 08/2025), DRM0008A mpds160 (4218889/A 01/2025), DNX0008A mpds560 (4221623/A 08/2014). Thermal pads are drawn as nominal
13# +/-0.1. DNX0008A gives its height as 0.5 maximum only.
14OUTLINES = {
15 "DSQ0010A": ("WSON", 10, 0.4, (1.9, 2.1), (1.9, 2.1), (0.7, 0.8), (0.0, 0.05), (0.2, 0.4), (0.15, 0.25), 0.9, 1.5, 0.2),
16 "NGQ0008A": ("WSON", 8, 0.5, (2.9, 3.1), (2.9, 3.1), (0.7, 0.8), (0.0, 0.05), (0.3, 0.5), (0.2, 0.3), 1.6, 2.0, 0.1),
17 "DNT0012B": ("WSON", 12, 0.5, (3.9, 4.1), (3.9, 4.1), (0.7, 0.8), (0.0, 0.05), (0.3, 0.5), (0.2, 0.3), 2.6, 3.0, 0.1),
18 "NHR0016B": ("WSON", 16, 0.5, (4.9, 5.1), (3.9, 4.1), (0.7, 0.8), (0.0, 0.05), (0.3, 0.5), (0.2, 0.3), 2.6, 4.0, 0.1),
19 "DNX0008A": ("X1SON", 8, 0.5, (2.9, 3.1), (2.9, 3.1), (0.5, 0.5), (0.0, 0.05), (0.35, 0.45), (0.2, 0.3), 1.65, 2.38, 0.127),
20 "DRM0008A": ("VSON", 8, 0.8, (3.9, 4.1), (3.9, 4.1), (0.8, 1.0), (0.0, 0.05), (0.3, 0.5), (0.23, 0.38), 2.45, 3.38, 0.1),
21}
22# The pin-1 mark is a proportion, for looks.
23
24
25def mid(pair):
26 return (pair[0] + pair[1]) / 2
27
28
29kind, pins, pitch, L, W, H, standoff, term_l, term_w, pad_x, pad_y, thick = OUTLINES[package]
30length, width, top, standoff, term_l, term_w = mid(L), mid(W), mid(H), mid(standoff), mid(term_l), mid(term_w)
31per_row = pins // 2
32first = -(per_row - 1) * pitch / 2
33model = Model()
34model.plane("body_plane", on="XY", offset=standoff, name="Body")
35with model.sketch("body_sketch", on="body_plane", name="Body") as sk:
36 sk.rect("body_rect", (-length / 2, -width / 2), (length / 2, width / 2))
37model.extrude("body", "body_sketch", distance=top - standoff, name="Body")
38if detail == "full":
39 model.plane("top_plane", on="XY", offset=top, name="Top")
40 with model.sketch("mark_sketch", on="top_plane", name="Pin-1 mark") as sk:
41 sk.circle("mark_circle", (-length / 2 + 0.15 * width, -width / 2 + 0.15 * width), 0.05 * width)
42 model.extrude("mark", "mark_sketch", distance=-0.03, op="cut", name="Pin-1 mark")
43 for tag, side in (("low", -1), ("high", 1)):
44 y_out, y_in = side * width / 2, side * (width / 2 - term_l)
45 with model.sketch(f"terms_{tag}", on="XY", name="Terminals") as sk:
46 for i in range(per_row):
47 x = first + i * pitch
48 sk.rect(f"term_{tag}_{i}", (x - term_w / 2, min(y_in, y_out)), (x + term_w / 2, max(y_in, y_out)))
49 model.extrude(f"terms_{tag}_body", f"terms_{tag}", distance=thick, name="Terminals")
50 # the thermal pad's across-the-rows size runs along Y, its along-the-rows size along X
51 with model.sketch("pad_sketch", on="XY", name="Thermal pad") as sk:
52 sk.rect("pad_rect", (-pad_y / 2, -pad_x / 2), (pad_y / 2, pad_x / 2))
53 model.extrude("pad", "pad_sketch", distance=thick, name="Thermal pad")
54model.material("pla", color="#26282b")
55result = model.result()
56

No-lead small-outline IC packages for board layouts: body, pin-1 mark, terminals and exposed thermal pad, each from a named TI package outline. See the README.

No-lead small-outline package

No-lead small-outline IC packages (WSON, VSON, X1SON), each modelled from a named TI package outline: the body, the terminals along two sides and the exposed thermal pad underneath. The package is centred on the origin with the seating plane on the XY plane. Pins 1 to n/2 are on the -Y side running +X, the others are on +Y running back, and the thermal pad is in the middle.

Source

TI package outlines at https://www.ti.com/lit/pdf/<document>:

Outline Package Body Pitch Document Drawing
DSQ0010A WSON-10 2 x 2 mm 0.4 mm mpds335 4218906/A 04/2019
NGQ0008A WSON-8 3 x 3 mm 0.5 mm mpds403 4214922/A 03/2018
DNT0012B WSON-12 4 x 4 mm 0.5 mm mpds48 4214928/C 10/2021
NHR0016B WSON-16 4 x 5 mm 0.5 mm mpds42 4214932/B 08/2025
DRM0008A VSON-8 4 x 4 mm 0.8 mm mpds160 4218889/A 01/2025
DNX0008A X1SON-8 3 x 3 mm 0.5 mm mpds560 4221623/A 08/2014

Each outline gives body length and width, height, standoff, terminal length and width, and the thermal pad's size. The model uses the middle of each range; DNX0008A gives its height as 0.5 maximum only. The terminal thickness is the outline's reference value.

The thermal pad is the TI outline's. A footprint whose name gives a different pad size, such as DFN-8-1EP_4x4mm_P0.8mm_EP2.5x3.6mm against DRM0008A's 2.45 x 3.38 mm, isn't this part even when the body and pitch match.

A footprint name's pad counts as the outline's when each side is within 0.05 mm, since pad labels are rounded. Matched within that: DFN-8-1EP_3x3mm_P0.5mm_EP1.66x2.38mm to DNX0008A (1.65 x 2.38 mm).

Proportions, for looks only: the pin-1 mark on top. The thermal pad's chamfered pin-1 corner isn't modelled.

Other WSON, VSON and DFN sizes and the QFN packages aren't here yet; see COVERAGE.md.

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